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CAN bus based on the Communication Design and Application

In Electronic Infomation Category: C | on April 20,2011

With the development of microprocessors, the use of microprocessor control of industrial processes has become a trend. In the industrial control process, because a lot of information sharing and UPD431016LE-15 datasheet and transmission of data, the traditional serial communication mode can not meet the requirements. In the field of industrial control, the need for a strong anti-interference, high reliability, high transmission speed and UPD431016LE-15 price and long distance bus architecture. CAN-bus technology not only meet the above requirements, but also multi-point between the transmission of information. This article uses the PCI9810-cAN CAN bus adapter card form on the local network multi-information transmission between the microprocessor and UPD431016LE-15 suppliers and the PC, the prosecution of multiple processors, communications.

1 CAN Bus Overview

CAN (Controller Area Networks) bus was first developed by the German Bosch bus technology for LAN control. CAN bus using the traditional two-wire serial communication with diagnostic capabilities, anti-electromagnetic interference, the most Shaanxi transfer rate up to 1 Mb s-1, the longest communication distance of up to 10 km (At this point the transmission rate is about 40 kb s-1). CAN bus is composed of the local network, communication between nodes do not use master-slave mode, but has bus access priority, and flexible means of communication, enabling point to point, multipoint and broadcast transmission of data.

2 Hardware Design of Communication Module

CAN bus by the PCI9810-CAN adapter card, this paper complete the design of communication nodes. Communication nodes and the PC, not only the exchange of information, but also independent and the other nodes. Microprocessor and the host or other nodes need to communicate, its P0 port by sending information to the SJA1000T register, then PCA82C250 pass information to the CAN bus. Determine the host and other communication nodes received the packet identifier, the information received will be handled accordingly, in order to achieve communication, shown in Figure 1.


Figure 1, the principle of system communication contacts

In the design process, in order to meet the real-time communication between multiple microprocessors and reliability requirements, combined with the characteristics of CAN controller of Figure 1 for a brief introduction:

(1) transceiver PCA82C250 pin 8 (Rs) There are 3 modes: high-speed, slope control and standby. Slope control function with anti-RF interference, so the use of 47 k resistor connected pin 8, to achieve the slope control mode.

(2) in Figure 1 should be isolated for two high-speed optical coupling device 6N137, 6N137 output pin as the driving ability is not enough, need to connect one of about 390 pull-up resistor to increase the output pin drive capability. 6N137 Optocoupler isolation of two power devices with 5 V signals the DC-DC isolation module WRA0505P, to enhance the systems noise immunity.

(3) transceiver pins CANH, CANL PCA82C250 of the free passage of a 5 resistor is connected with the CAN bus, limiting resistors play a role in protecting the PCA82C250 from the CAN bus over-current shocks.

(4) PCA82C250 the transceiver and power pins CANH and CANL respectively, to reverse a protection between the diode and the 30 pF capacitor, you can play the role of CAN bus over-voltage protection and over-current shocks.

(5) CAN controller SJA1000T There are 2 input methods: Intel and Motorola input input. In this Intel-input methods, so SJA1000T the MODE pin is connected high.

(6) designed to TX0 and RX0 pin only, according to the required communication protocol SJA1000T input / output logic level relationship, SJA1000T the TX1 pin floating, RX1 pins must be maintained at 0.5 Vcc potential above, so In the TX1 pin connected to about 6.8 k and 3.6 k resistor divider.

(7) C51 microprocessor pin P2.7 CAN controller SJA1000T then the chip select signal / CS, the register shows that the first CAN controller SJA1000T address 8000H. C41 and the CAN controller processor 12 MHz crystal SJA1000T shared to improve the communication speed.

Through the above analysis, the design of the circuit diagram shown in Figure 2.


communication node in Figure 2 circuit diagram

3 Software Design of Communication Module

The software communication module consists of 3 parts: the initialization process, send process and acceptance process. This 3 part of the program only, to complete the transfer of information between communication nodes. CAN bus applied to more complex communication systems, but also consider the CAN bus error handling, processing and other functions and overloading nodes is calculated. Since each node has its own communications MCU, so they are free to communicate between. PCA82C250 through CAN transceiver pins CANH, CANL outputs on the bus, the bus performance "dominant", then send the message. Determine the performance of the bus as a "dominant", it is necessary to prepare for receiving the information.

3.1 CAN controller SJA1000T initial program

Into the reset state of the program first, the mode register set MR SJAl000T to Basic CAN mode, acceptance code register and mask register ACR AMR, then set the timer 0 and timer 1 output control register, OCR, reset control register CR, to return to normal mode. Initialization process flow chart shown in Figure 3.


initial program flow chart in Figure 3

3.2 Sending Program This system uses interrupt

send a message, this can save resources and improve communication efficiency. Need to send a message, first information combined into one message: the data frame or remote frame. Into the transmission process, first turn off the break, protection of the site, reading the interrupt register is to send an interrupt will be written to send the message buffer, set the command register allows you to send, open interrupt. Send program flow diagram shown in Figure 4.


send program flow chart in Figure 4

3.3 acceptance procedure

Still use this system interrupt to receive information. Receive more complex procedures, the need for false alarms, receiver overflow, etc. for further processing. Information message is sent through the CAN bus receiver buffer, the receive interrupt is set, the processors cache from the controller SJA1000T read the information inside, and then set a new reception signs, open interrupt. Receive program flow chart shown in Figure 5.


receiving process flow chart in Figure 5

4 Conclusion

To multiple communication nodes connected to the PCI9810-CAN CAN-bus adapter cards, form a local communication network, PC, enabling the prosecution of multi-node communication and information transfer, communications, high-speed communication between nodes. In practice, can achieve about 110 communication between communication nodes, but the system is more complex, less efficient communication, you need to consider the PCI9810-CAN adapter process improvement and communication nodes and the corresponding application of the algorithms. In the multi-machine communication system design process, mainly through the preparation of software to improve the system of high-speed transmission.

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