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A320 simulator based on CAN bus of hardware emulation program

In Electronic Infomation Category: A | on April 26,2011

Abstract: When the aircraft simulator hardware emulation system modules and PLHS501A datasheet and more frequent communication, complex structure caused by complicated wiring between modules, and PLHS501A price and the resulting interference problem, a CAN bus based cockpit simulation program. The program is responsible for logical operations in the host computer, the next crew responsible for operating the information collection, through the CAN bus is on, the next crew to form a network to realize functional simulation cockpit. Describes the systems overall structure, design the entire cockpit data transfer protocol, combined with practical application, the transceiver node in the hardware design of the data structure and PLHS501A suppliers and data transmission software implementation. Test results show that the design layout is simple and reliable data transmission, to achieve the desired objectives. Power under the Civil Aviation

the needs of national construction, domestic demand for the aircraft simulator is increasing, but the size of the domestic development of simulators can not meet the increasing market demand, if the introduction of foreign simulator is not only costly, and not conducive to technology to master, so to expand the scale of independent research and development simulator has become an inevitable trend. Taking into account various models of cockpit functions in common, namely, system modules and more frequent communication, complex structure caused by complicated wiring between modules, and the resulting interference problem, a cockpit hardware simulation program, which stability of the cockpit to meet the communication between modules, and simplified wiring.

1 program set Cockpit Simulation

mainly in the form of packets carrying information on the operation of the system modules, complete the logic operation by the host computer, to achieve functional simulation cockpit. Cockpit design principles simulation is stable, that is, the cockpit should have a certain degree of fault-tolerant network capacity, data transmission process in the conflict if the competition, there should be a mechanism for conflict resolution, without loss of data, and CAN (Cont roller A rea Netw or k) is an effective support for real-time control of distributed control or serial communication network, with outstanding reliability, timeliness and flexibility, based on the selected CAN bus network communication solutions for the entire cockpit. Complex structure of the cockpit, versatile, so be on the cockpit function modules, the modules communicate through the CAN bus, the following from system design, CAN node data communication interface hardware and software design of three aspects of transfer elaborate on the program.

2 system design

Cockpit display in the main part of the Electronic Flight Instrument System (Elect ronic Flight Inst rument System, EFIS), electronic centralized aircraft monitoring (Elect ronic Cent ralized Aircraft Mo nitoring, ECAM), respectively by 3 sets of touch-screen display , which shows the logical unity of the PC control. Operating part of a roof version, the central console, black plate, side bars, this 4 all the hardware, based on the principle of zoning classification to the module, each module is a node. Figure 1 shows the overall architecture.

overall structure of Figure 1 Figure

Because there is a logical control of the relationship between nodes, so the main way to communicate with multiple, CAN bus network took office as the master node of a node can send data to other nodes. Host computer as one of the nodes, through intelligent CAN bus and network adapter cards to communicate with each node, responsible for the main logic operation and control of the cockpit display, the other nodes not only capture the action to complete the operation, but also each other under the logic required control.

3 CAN node communication interface hardware design

The cockpit between the nodes of the control logic of the complex, large amount of data, communication frequency, so the main chip on each node has a higher storage capacity requirements, and on the CAN bus network stability of data transmission in a more high demand. Select C80C51F040 for the main chip, because it has 4 352 B RAM and 64 KB of FLA SH, meet the program application needs. CAN controller integrated within it, it is compatible with CAN specification 2. 0A and 2. 0B, mainly by the CAN Core, Message RAM (separate from CIP51 of RAM), the message processing unit and control registers.

CAN core by the CAN protocol controller and is responsible for sending and receiving packets of serial / parallel conversion RX / TX shift registers. Message RAM to store packets goals and objectives of the arbitration of each mask. The CAN processor 32 is configured to send and receive free packets of goals and objectives of each packet has its own identification mask, all data transmission and reception filtering is done by a CAN controller, rather than completed by the CIP51. C8051F040 CAN possess perfect and independent CAN bus controller message buffer, can solve the MCU (MicroCo nt ro l U nit) and CAN bus between the serial / parallel conversion, baud rate error between different nodes of the correction, and MCU with CAN bus communication and synchronization conflict competition issues, for the high stability of the CAN bus network provides a reliable protection.

CAN bus transceivers use TIs SN65HVD230 chip that normal mode design allows low current chip heat a small (typical value is 370 A), and its optimized design allows the drive to further improve the signal quality ; To further improve the system anti-interference ability, in the master chip C80C51F040 and inserted between the transceiver SN65HVD230 6N137 optocoupler for electrical isolation, the communication signals transmitted to the conductor occurs when the endpoint of reflection, reflected signals can interfere with normal signal transmission, thus connected with the bus termination resistors at both ends to eliminate the reflected signal, effectively isolating the interference signals on the CAN bus, enhanced system reliability. Figure 2.

Figure 2 CAN communication interface node diagram

4 data transfer software CAN bus

sent in each packet has only a 11-bit or 29-digit ID, when in conflict, arbitration device ID value for the size of the decision based on the highest priority ID to send, the other exit bus. CAN bus status depends on the binary number 0 instead of 1, that signal is the line "and" relationship: When a node sends one, the other node sends 0, the other node receives the signal 0. Therefore, the smaller the value ID, the security message with higher priority.

4. 1 CAN communication protocol design

Communication protocol design includes two parts, to determine the definition of the message ID and 8-bit data packet contained in the specific meaning of each. As the message ID to determine its priority, so it is necessary to determine the actual logic of the priority of each packet, as part of cockpit operations less than 1 000 parts, so a standard format frame, 11-bit identifier can express 2 11 - 1 is equal to 2 047 kinds of packets to meet the actual demand. Each packet contains 8 bytes of data, due to the host computer for the main logic operations, so the PC should be based on the contents of each packet precise positioning of the cockpit by the operating components, the definition of the format shown in Figure 3.

Figure 3, packet data capabilities defined

Agreement with Data0 ~ Data4 five bytes carry all the information, the information including board number (Penal Number), part number (Compo nentNumber), part category (Component Sor t), parts of the state values ??(integer and fractional part ) and the decimal flag (Do t). After integration, a total of 32 panels, so that panel with 5-bit binary number, plate number (PN0 ~ PN4) corresponds to Data3. 3 ~ Data3. 7; each panel are less than 128 the number of components, parts breaker panel most, for the 125, so that items with 7-bit binary number, part number (CN0 ~ CN6) corresponds to Data4. 0 ~ Data4. 6; under component output state will be divided into five categories, namely the button, the band switch, potentiometer devices, display and jump switch, so that pieces with 3-bit binary categories, components, categories (CS0 ~ CS2) corresponds to Data3. 0 ~ Data3. 2; components integral part of the state value (Int0 ~ Int15) corresponds to Data1. 0 ~ Data1. 7 and Data2. 0 ~ Data2. 7, state the value of the fractional part (Dec0 ~ Dec7) corresponds to Data0. 0 ~ Data0. 7, decimal flag (Dot) corresponds data4. 7.

4. 2 Communication

CAN bus node implementation of data transmission is divided into three parts, namely, initialization settings, send data and receive data. Initialize CAN controller, the general steps are as follows:

(1) the SFRPAGE register is set to CA N0_PA GE;

(2) the CAN0CN register IN IT and CCE bit is set to 1;

(3) Set bit timing registers and BRP extension register timing parameters;

(4) initialize the object for each message or to MsgVal bit is set to null and void;

(5) the INIT bit. For inquiries and interrupt to receive data in two ways, the paper used in the design of interrupt. Receive data process flow chart shown in Figure 4.

Incoming data on the bus when the program enters the interrupt, read the interrupt register value, which corresponds to 32 message objects in message number one, write the message number IFx Command Request Register, read IFx message control register, see flag NewData, value of 1 indicates a new data value of 0 indicates no new data, read in the current data block to view the end of the data bits is Eob, is a data block that end, the current data Receive completed; value of 0 indicates that the data block is not the end, the message number by one, continue to receive the next message in the object data until reception completion. Register must be configured to send data, set the message ID, also need to write data to the data register in time, written after the first to write high low, that is, the first assignment of CAN 0DAT H, and then the CAN0DAT L assignment, the last message No. IFx Command Request Register is written to start the data transfer.

receive data flow diagram in Figure 4

5 Concluding Remarks

Actual test showed that communication between the module stability, strong anti-interference, and the wiring simple. The program has been applied to fault diagnosis of electronic systems onboard simulator, although the simulator is a model for the A320, but the program can also be extended to the other models in the simulator, and has broad application prospects.

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