Tensilica Xtensa series of enhancements, add new hardware option, the bus bridge and software tools

Tensilica has announced the completion of its Xtensa configurable processor family (Xtensa 7 and NC7SZ32M5X datasheet and Xtensa LX2) to upgrade, add new hardware options and NC7SZ32M5X price and software enhancements to make it more suitable for SoC (System on Chip) design engineers demand. Added features include support for a new, smaller general purpose register file, a new integer multiplier and NC7SZ32M5X suppliers and divider operation unit, 2 new AMBA ? (3.0 Advanced Microcontroller Bus Architecture) bus bridge, as well as a new user-friendly configuration tools, The tool analyzes C / C + + source code, and automatically suggests VLIW (very long instruction word) instruction extensions to the code performance than general-purpose code, 30% -60% increase. All the new features provide design engineers with the highest production capacity of configurable processor design environment, automated to ensure that each processor design from the structure are all correct.

Tensilica president and CEO Chris Rowen said, "represents a new generation of products, Tensilica Xtensa processor product line in the three areas increased significantly, one of the deeply embedded data engine tendency to support more configurable; Second, more abundant on the high-end systems support; Third, Tensilica processors significantly enhance the analysis, modeling and software tools. Tensilica Xtensa processor family has been well received by the attention. all the enhancements both to help existing Xtensa users design more complex SoC products, and also allows The new design engineers design with less power than in the past and design time to obtain the configurable processor brings all the advantages. "

Tensilica Steve Roddy, vice president of marketing, said," Xtensa configurable processor architecture very flexible, the current production in a variety of functions, such as simple and non-cache controller and medium-sized Linux application processors, high-performance 3-issue VLIW general purpose processor, the audio DSP (digital signal processors), video DSP engine, high-performance image processor and high-performance network processors. any other kind of processor architecture and its function can not be phase-match. "

new hardware options

Tensilica released five the latest hardware options include: a 16 - into the register file, a floating exception vector option, a small area multiplier, an integer divider, and a new bridge compatible with AMBA.

First, Tensiilca in the Xtensa processor in addition to existing 32 - and 64-entry - into configurable options, add a small 16 - entered the register file, making the instance of a very small processor IP core, we can get more than 8-bit and 16-bit microcontroller smaller size and lower power consumption, and performance, flexibility and functionality equivalent to a 32-bit controller.

Second, by adding a floating exception vectors, Tensilica enable clients to tape after the changes through software handles exceptions and interrupts memory location. This feature gives SoC designers more flexibility and simplify system design.

Third, Tensilica added a small area, multi-cycle 32x32 multiplier configuration option, so that one kind of Xtensa configuration design space can be very small, but in a good performance with the multiplication applications, such as MP3 decoding. This feature provides design engineers a new option, than the existing single-cycle, fully pipelined 32-bit and 16-bit multiplier configuration options for a smaller area than the pure software simulation with higher performance multiplication instruction.

Fourth, Tensilica added a small area divider configuration option, only 4000. This option provides a standardized, powerful way to improve the performance of enhanced digital applications, such as those running on GPS (global positioning satellite) controllers and real-time control code, and other typical servo, engine and engine control applications.

Finally, Tensilica added AMBA 3 AXI bridge as a click on an optional configuration options. This option, combined with existing AMBA 2 AHB-lite (a subset of advanced high-performance bus) bridge option, allows designers to seamlessly embed the Xtensa processor, AMBA-based system to simplify the Xtensa processor AMBA peripherals and other common use.