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EP1C3T100 chip data sources offer PDF | ARM-based high-speed data acquisition card

In Electronic Infomation Category: E | on November 17,2010

1 Introduction

With modern industrial production and LM224D datasheet and scientific research on the increasing requirements of data collection, in the transient signal measurement, image processing and LM224D price and some other high-speed, high precision measurement, the need for high-speed data acquisition. Now a common high-speed data acquisition card is a PCI card or the general multi-ISA card, there is the following disadvantages: Installation complicated, expensive, subject to the slot machine number, address, interrupt resource constraints, scalability is poor, in a number of strong electromagnetic interference testing site, not specifically to do their electromagnetic shielding, resulting in distortion of collected data.

the data acquisition card company using Philips LPC2142 microcontroller (based on the ARM7 core, built a wide range of USB 2.0 Serial Communication Interface), effective solution to the traditional high-speed data acquisition card of the defects.

2 data acquisition card based on the principle ARM

The system consists of dual-channel analog / digital converter AD9238, ARM microcontroller and LM224D suppliers and FPGA devices EP1C3T100 composition. Block diagram shown in Figure 1. AD9238 with A, B two channels, the front end differential amplifier for analog signal amplification sent to the AD9238, the AD9238 analog signals into 12-bit digital signal, sent to the FPGAs FIFO buffer. Pieces produced by the LabVIEW based interface to send control commands to the LPC2142, LPC2142 read the data in the FIFO buffer and sent to the host through the USB port. Also through the interface menu to select the host sampling frequency, the starting point of sampling, analog signal conditioning and reading accuracy frequency measurement data.

3 data acquisition hardware architecture

3.1 AD9238 Introduction

AD9238 is Analog Devices (ADI) introduced 12-bit, dual-channel ADC device. The converter is divided into 3 models, respectively, the highest sampling rate of up to 20 MS / s, 40 MS / s and 65 MS / s. It provides single-channel A / D converter dynamic performance as excellent, but with more than using two single-channel A / D converter and better resistance to crosstalk performance; a single 3 V power supply (2.7 V ~ 3.6 V); Rsn = 70 dBc; Rsfd = 85 dBc; ENOB = 11.3 b; differential input when the 3 dB bandwidth of 500 MHz; with on-chip reference voltage and SHA; 1 ~ 2 Vpp analog input range; output data format is offset a binary code or a binary complement.

AD9238 the two channels were used as an AD8138 op amp drives. I / O, respectively, two intermediate frequency analog signals through two AD8138 into a differential signal sent to A / D converter (s 2,3,14, IS pin).

high-speed ADC is sensitive to the clock duty cycle, in general, need to have 50% (± 5%) duty cycle. Provided separately for each channel AD9238 clock (pin CLK_A and CLK_B), when the two-channel sampling clock with frequency and phase, the performance is better, when the two channels are not synchronized, the performance will decline.

the data acquisition card with 40 MHz of the AD9238, single and double channel selection and switching frequency can be controlled.

3.2 Cyclone series FPGA devices

high-speed data acquisition system as the special requirements of a number of FPGA devices in the selected Alteras Cyclone series of devices. Stratix Cyclone series of advanced technology-based framework for high-speed application provides a very high price, in addition to the internal RAM memory devices Cyelone can generate FIFO buffer, to provide buffer space for high-speed sampling.

Alteras Quartus II software is an easy to use comprehensive development tool that integrates Alteras FPGA / CPLD development process involved all the tools and third-party software interfaces, user friendly design provide convenient conditions.

FPGA devices are done here, data cache, and other precision frequency measurement, frequency and sampling frequency trigger control and so on.

3.3 FPGA control of the trigger

data acquisition card is because this type of cache, cache space is limited, so we can not use continuous acquisition mode, and the use trigger acquisition way. To improve the data acquisition card for capacity, not only periodic signals can be collected, and can capture trigger signal can also manually trigger the acquisition, the author increased the trigger point catch circuit. System consists of the voltage comparator AD8561 and FPGA devices composed, AD8561 conversion speed is high, high enough to meet the requirements to determine the speed. First of all analog signals to the AD8561 comparator positive input, negative input connected to the LPC2142 the D / A converter output terminal, LPC2142 the D / A converter output voltage as the AD8561 comparator reference voltage, the reference voltage can be the LPC2142 the D / A converter register to write different values to adjust, the adjustment made the final through the LabVIEW interface control. When the input voltage is higher than the reference voltage, AD8561 pulled the output TOUT, TOUT level can be input to the AD8561s high end of the latch LATCH.

collected in the manual mode, TRIENO is low, TRIEN1 high, when the cache is empty or FWr_FUL high, made through the LabVIEW interface control QSTART is high, FWr_EN be pulled data collection. When the buffer is full FWr_FUL pulled down, and stop collecting data.

trigger mode input signal, TRIEN0 and QSTART low, when the cache is empty or FWr_FUL is high, the input signal voltage is higher than the comparator reference voltage, TOUT is pulled high , FWr_EN is pulled high to data collection. When the buffer is full FWr_FUL pulled down, and stop collecting data. After the read cache data pulled TRIEN1.

acquisition cycle signal and the input signal is triggered in a similar way, just keep TRIEN1 high. In the read cache data. Collecting data after the arrival of the trigger signal.

4 high-speed data acquisition card, software design

4.1 Based on μC / OS-IIs USB-driven programming

μC / OS-II provides real-time multi-task operating system kernel. In the application of the operating system, often require the user to write their own based on μC / OS-II in the peripheral device driver to enable peripheral devices to the operating system, better coordination of services for users. In order to make software portability, easy maintenance, the author in the preparation of comprehensive consideration LPC2142 USB USB protocol firmware, LPC2142 USB hardware conditions, the driver is divided into five layers, two-way line that the user software and USB data exchange exists between the firmware , the upper one-way line of said software calls to lower the software, which makes the firmware structured.

have a USB driver, users can complete the user software on this platform to achieve the task, one-way line of the main tasks that the task of reading and writing control. Controlled by the main task semaphore read / write task running state, enabling the FIFO buffer read and write; two-way line that exists between the various modules of data exchange. To speed up the sending and receiving large amounts of data, the logic of the program to LPC2142USB endpoint 1 as a control command transmission channel, the endpoint 2 as a data transmission channel.

the main task of constantly reading the endpoint 1, when receiving the PC, sent to the read command to activate the high-priority task ready to read the semaphore. Read into the reading task is the interrupt service routine wake-up, will cache the data sent through the USB bus, PC, send the completed mission ready after the close reading of the semaphore, return to the main task of the loop, waiting for the next PC, sent a command. Writing task Similarly, no narrative.

4.2 Based LabWindow / CVI host software programming

4.2.1 LabWindows / CVI Overview

as a virtual measurement instrument, the key is to build good working order with ease interface and powerful tools for data processing software. Programming the system is developed LabVIEW. NI LabVIEW is developed by the United States based on C / C + + special instrumentation and process control for virtual visual programming language provided by LabVIEW Control Parts Library (including switches, knobs, charts, etc.) it is easy to design realistic requirements, new and beautiful interface. LabVIEW also has strong data processing capabilities, it provides a rich library function for data input, data processing (FFT, etc.) and graphical display functions for the development of software applications bring great convenience.

4.2.2 Programming

the entire design process consists of four parts: the panel design, initialization, data acquisition, data processing and results, through careful design process, and basically complete the intended function of the measurement. And to ensure that the system speed. Some features of each are described below.

(1) Panel design: provides a friendly interface, consistent with the operation of conventional measuring instruments used.

(2) Initialization: Complete system initialization functions, including reset, send the word work, set to run parameters.

(3) Data Acquisition: LabVIEW users can not directly access the hardware of their own design as an open development platform, LabVIEW provides a DLL interface, the LabVIEW platform, users can call other software modules, compile the . And provide object linking and embedding technology (OLE) support. I use VC + +6.0 prepared DLL file and call the file under the LabVIEW environment to achieve the LabVIEW data acquisition card procedures and data communications.

the following USB devices to read and write is the DLL created by compiling project documentation:

DLLBulk.h: variable or function declaration header file function.

DLLBulk.def: the module definition file is described by a number of statements DLL module parameters consisting of text files.

DLLBulk.cpp: the code is the main DLL file.

on DLLBulk.dsw all files are compiled under the following in the menu bar select Build-> Build DLLBulk.dll be to generate a DLL file called LabVIEW.

(4) data processing and display: a sampling of the data in memory processing for a variety of different measurement purposes. Including waveform display, automatic measurement signal amplitude and time, map disk, remove the graphics and additional features such as playback. Due to space limitations, the program list here a little.

5 Conclusion

described in the text of the entire virtual machine AC measurement system is fully operational in the run, and measured parameters can be changed at any time and conduct a variety of signal processing. System indicators are: the maximum sample rate of 40 MHz, and may be 1 / 2, 1 / 4, 1 / 8 ... 1 / 128 sampling frequency programmable, dual analog input; ADC 12-bit accuracy; analog input range is 0 V ~ 2V; 4 KB on-board data cache bytes / road transport for the block transfer mode. The system can real-time signal waveform, the signal maximum, minimum, peak to peak display, while providing a display graphics file archiving, playback, delete processing.

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